ctg. morning brief, 27 Sep 2026
On 27 Sep 2026, SemiAnalysis STEEL tore down Intel Panther Lake (26 Sep): first commercial backside power delivery (PowerVia) and Intel's first RibbonFET GAA on shipped 18A, with Foveros-S packaging. Measured 18A compute logic density is roughly similar to TSMC N3E GPU logic; 18A does not lead TSMC N3P, N2, or Samsung SF2 peak density. Versus Lunar Lake, P-core area is nearly flat while L2 rises from 2.5 to 3 MiB (+20% L2 in the same area), and NPU area drops 36.9% while still clearing Microsoft's Copilot+ bar of at least 40 TOPS. The high-end GPU tile stays on TSMC N3E. SemiAnalysis numbers throughout.
Why it matters: Europe's foundry debate still runs on slides. A lab that puts shipped 18A next to N3E and N2 is the measured check on Intel's comeback and on every European bet that assumes US capacity. Edition candidate: process reality versus Chips Act demand politics.
Source: https://newsletter.semianalysis.com/p/intel-panther-lake-teardown
Eaton agreed to buy Italy's COL Group from Oaktree for an enterprise value of €810m, adding SF6-free medium-voltage switchgear, grid automation, and modular power across plants in Turin, Milan, Bergamo, and Catania (about 400 staff; COL forecasts €250m sales in 2027). Close expected in Q1 2027 subject to approvals (Eaton, 25 Sep).
Why it matters: Data centers and utilities buy power gear, not speeches. Italian medium-voltage capacity joining a global grid-to-chip stack is Europe's rare industrial product that already ships.
Source: https://www.afp.com/en/agency/inside-afp/external-press-releases/eaton-signs-agreement-acquire-col-group-expanding
Dutch NADI (launched this month with €500m) and Germany's SPRIND will commit €40m over 20 months to small teams using AI to accelerate chip design for training and inference, aiming for orders-of-magnitude faster cycles than today's years-long process. Prime Minister Rob Jetten put the Dutch-German link on the record; NADI co-founder Jelle Prins frames inference silicon as the European gap next to the ASML ecosystem (Reuters, 23 Sep).
Why it matters: Design speed is the bottleneck after fabs. A Dutch-German cheque for AI-native design is a decision Europe can execute, not another Chips Act subtitle.
Source: https://www.reuters.com/business/german-dutch-strategic-innovation-agencies-collaborate-ai-chip-design-2026-09-23/
The Dutch Photonic Chip Pilot Line at High Tech Campus Eindhoven reached its highest-point milestone (ceremony 22 Sep; campus news 24 Sep): the world's first industrial Indium Phosphide photonic chip factory at 6-inch wafer scale. €150m under the European Chips Act / PIXEurope, with TNO, TU/e, PhotonDelta, and SMART Photonics.
Why it matters: AI racks need optics Europe can make. A 6-inch InP line is a manufacturing path, not a white paper.
Source: https://www.hightechcampus.com/news/dutch-photonic-chip-pilot-line-reaches-highest-point/